d4/d6f/riscv_2mmu_8h_source.html

/* SPDX-License-Identifier: GPL-2.0+ */


#ifndef __MMU_H__

#define __MMU_H__


#ifdef __cplusplus

extern "C" {

#endif


#include <stdint.h>

#include "csr.h"

#include "timer.h"

#include "barrier.h"

#include "cache.h"

#include "interrupt.h"


void mmu_enable(void);


int sysmap_add_mem_region(uint32_t start_addr, uint32_t len, uint32_t mem_attr);


#ifdef __cplusplus

}

#endif


#endif /* __MMU_H__ */

uint32_t
u32_t uint32_t
Definition stdint.h:13

csr.h

barrier.h
Memory barrier definitions for RISC-V architecture.

cache.h
Cache control functions for RISC-V architecture.

interrupt.h
Interrupt control functions for RISC-V architecture.

sysmap_add_mem_region
int sysmap_add_mem_region(uint32_t start_addr, uint32_t len, uint32_t mem_attr)
Adds a memory region to the system memory map.
Definition cache.c:101

mmu_enable
void mmu_enable(void)
Enable the SV39 MMU with cache initialization.
Definition cache.c:221

timer.h

stdint.h