SyterKit
0.4.0.x
SyterKit is a bare-metal framework
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include
arch
riscv
csr.h
Go to the documentation of this file.
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#ifndef __RISCV_H__
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#define __RISCV_H__
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#define MSTATUS_UIE (1 << 0)
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#define MSTATUS_SIE (1 << 1)
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#define MSTATUS_MIE (1 << 3)
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#define MSTATUS_UPIE (1 << 4)
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#define MSTATUS_SPIE (1 << 5)
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#define MSTATUS_MPIE (1 << 7)
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#define MSTATUS_SPP (1 << 8)
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#define MSTATUS_MPP (3 << 11)
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#define MSTATUS_FS (3 << 13)
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#define MSTATUS_XS (3 << 15)
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#define MSTATUS_MPRV (1 << 17)
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#define MSTATUS_SUM (1 << 18)
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#define MSTATUS_MXR (1 << 19)
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#define MSTATUS_TVM (1 << 20)
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#define MSTATUS_TW (1 << 21)
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#define MSTATUS32_SD (1 << 31)
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#define MSTATUS_UXL (3ULL << 32)
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#define MSTATUS_SXL (3ULL << 34)
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#define MSTATUS64_SD (1ULL << 63)
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#define MXSTATUS_MM (1 << 15)
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#define MXSTATUS_THEADISAEE (1 << 22)
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#define MHCR_IE (1 << 0)
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#define MHCR_DE (1 << 1)
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#define MHCR_WB (1 << 2)
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#define MHCR_WA (1 << 3)
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#define MHCR_RS (1 << 4)
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#define MHCR_BPE (1 << 5)
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#define MHCR_BTE (1 << 12)
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#define MHINT_D_PLD (1 << 2)
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#define MHINT_AMR_0 (0b00 << 3)
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#define MHINT_AMR_1 (0b01 << 3)
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#define MHINT_AMR_2 (0b10 << 3)
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#define MHINT_AMR_3 (0b11 << 3)
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#define MHINT_IWPE (1 << 10)
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#define MHINT_PREF_N_2 (0b00 << 13)
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#define MHINT_PREF_N_4 (0b01 << 13)
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#define MHINT_PREF_N_8 (0b10 << 13)
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#define MHINT_PREF_N_16 (0b11 << 13)
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#define MHINT_AEE (1 << 20)
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#define MHINT_PCFIFO_FREEZE (1 << 24)
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#define MIP_USIP (1 << 0)
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#define MIP_SSIP (1 << 1)
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#define MIP_MSIP (1 << 3)
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#define MIP_UTIP (1 << 4)
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#define MIP_STIP (1 << 5)
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#define MIP_MTIP (1 << 7)
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#define MIP_UEIP (1 << 8)
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#define MIP_SEIP (1 << 9)
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#define MIP_MEIP (1 << 11)
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#define MIE_USIE (1 << 0)
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#define MIE_SSIE (1 << 1)
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#define MIE_MSIE (1 << 3)
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#define MIE_UTIE (1 << 4)
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#define MIE_STIE (1 << 5)
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#define MIE_MTIE (1 << 7)
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#define MIE_UEIE (1 << 8)
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#define MIE_SEIE (1 << 9)
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#define MIE_MEIE (1 << 11)
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/* RISC-V Privilege */
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#define PRV_U (0)
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#define PRV_S (1)
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#define PRV_H (2)
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#define PRV_M (3)
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#define csr_swap(csr, val) \
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({ \
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unsigned long __v = (unsigned long) (val); \
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__asm__ __volatile__("csrrw %0, " #csr ", %1" \
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: "=r"(__v) \
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: "rK"(__v) \
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: "memory"); \
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__v; \
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})
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#define csr_read(csr) \
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({ \
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register unsigned long __v; \
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__asm__ __volatile__("csrr %0, " #csr \
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: "=r"(__v) \
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: \
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: "memory"); \
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__v; \
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})
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#define csr_write(csr, val) \
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({ \
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unsigned long __v = (unsigned long) (val); \
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__asm__ __volatile__("csrw " #csr ", %0" \
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: \
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: "rK"(__v) \
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: "memory"); \
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})
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#define csr_read_set(csr, val) \
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({ \
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unsigned long __v = (unsigned long) (val); \
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__asm__ __volatile__("csrrs %0, " #csr ", %1" \
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: "=r"(__v) \
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: "rK"(__v) \
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: "memory"); \
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__v; \
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})
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#define csr_set(csr, val) \
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({ \
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unsigned long __v = (unsigned long) (val); \
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__asm__ __volatile__("csrs " #csr ", %0" \
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: \
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: "rK"(__v) \
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: "memory"); \
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})
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#define csr_read_clear(csr, val) \
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({ \
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unsigned long __v = (unsigned long) (val); \
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__asm__ __volatile__("csrrc %0, " #csr ", %1" \
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: "=r"(__v) \
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: "rK"(__v) \
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: "memory"); \
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__v; \
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})
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#define csr_clear(csr, val) \
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({ \
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unsigned long __v = (unsigned long) (val); \
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__asm__ __volatile__("csrc " #csr ", %0" \
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: \
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: "rK"(__v) \
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: "memory"); \
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})
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#ifdef __cplusplus
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}
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#endif
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#endif
/* __RISCV_H__ */
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