SyterKit
0.4.0.x
SyterKit is a bare-metal framework
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include
drivers
chips
sun50iw10
reg-ncat.h
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2013-2025
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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*
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* original from bsp uboot defines
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*/
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#ifndef __SUN50IW10_REG_NCAT_H__
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#define __SUN50IW10_REG_NCAT_H__
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#define SUNXI_SRAM_A1_BASE (0x00020000)
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#define SUNXI_SRAM_A2_BASE (0x00100000)
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#define SUNXI_SRAM_C_BASE (0x00024000)
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#define SUNXI_CE_BASE (0x01904000)
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#define SUNXI_SS_BASE SUNXI_CE_BASE
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//CPUX
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#define SUNXI_CPUXCFG_BASE (0x08100000)
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#define SUNXI_CPU_SUBSYS_CTRL_BASE (0x08100000)
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//sys ctrl
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#define SUNXI_SYSCRL_BASE (0x03000000)
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#define SUNXI_CCM_BASE (0x03001000)
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#define SUNXI_DMA_BASE (0x03002000)
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#define SUNXI_MSGBOX_BASE (0x03003000)
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#define SUNXI_SPINLOCK_BASE (0x03004000)
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#define SUNXI_HSTMR_BASE (0x03005000)
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#define SUNXI_SID_BASE (0x03006000)
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#define SUNXI_SID_SRAM_BASE 0x03006200
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#define SUNXI_SMC_BASE (0x04800000)
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#define SUNXI_SPC_BASE (0x03008000)
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#define SUNXI_TIMER_BASE (0x03009000)
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#define SUNXI_WDOG_BASE (0x030090A0)
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#define SUNXI_CNT64_BASE (0x03009C00)
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#define SUNXI_PWM_BASE (0x0300A000)
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#define SUNXI_PIO_BASE (0x0300B000)
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#define SUNXI_PSI_BASE (0x0300C000)
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#define SUNXI_DCU_BASE (0x03010000)
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#define SUNXI_GIC_BASE (0x03020000)
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#define SUNXI_IOMMU_BASE (0x030F0000)
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//storage
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#define SUNXI_DRAMCTL0_BASE (0x04002000)
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#define SUNXI_NFC_BASE (0x04011000)
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#define SUNXI_SMHC0_BASE (0x04020000)
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#define SUNXI_SMHC1_BASE (0x04021000)
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#define SUNXI_SMHC2_BASE (0x04022000)
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#define SUNXI_UART0_BASE (0x05000000)
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#define SUNXI_UART1_BASE (0x05000400)
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#define SUNXI_UART2_BASE (0x05000800)
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#define SUNXI_UART3_BASE (0x05000c00)
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#define SUNXI_UART4_BASE (0x05001000)
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#define SUNXI_TWI0_BASE (0x05002000)
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#define SUNXI_TWI1_BASE (0x05002400)
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#define SUNXI_TWI2_BASE (0x05002800)
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#define SUNXI_SCR0_BASE (0x05005000)
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#define SUNXI_SPI0_BASE (0x05010000)
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#define SUNXI_SPI1_BASE (0x05011000)
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#define SUNXI_GMAC_BASE (0x05020000)
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#define SUNXI_GPADC_BASE (0x05070000)
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#define SUNXI_LRADC_BASE (0x05070800)
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#define SUNXI_KEYADC_BASE SUNXI_LRADC_BASE
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#define SUNXI_USBOTG_BASE (0x05100000)
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#define SUNXI_EHCI0_BASE (0x05310000)
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#define SUNXI_EHCI1_BASE (0x05311000)
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#define ARMV7_GIC_BASE (SUNXI_GIC_BASE + 0x1000)
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#define ARMV7_CPUIF_BASE (SUNXI_GIC_BASE + 0x2000)
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// cpus
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#define SUNXI_RTC_BASE (0x07000000)
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#define SUNXI_CPUS_CFG_BASE (0x07000400)
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#define SUNXI_RCPUCFG_BASE (SUNXI_CPUS_CFG_BASE)
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#define SUNXI_RPRCM_BASE (0x07010000)
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#define SUNXI_RPWM_BASE (0x07020c00)
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#define SUNXI_RPIO_BASE (0x07022000)
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#define SUNXI_R_PIO_BASE (0x07022000)
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#define SUNXI_RTWI_BASE (0x07081400)
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#define SUNXI_RRSB_BASE (0x07083000)
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#define SUNXI_RSB_BASE (0x07083000)
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#define SUNXI_RTWI_BRG_REG (SUNXI_RPRCM_BASE + 0x019c)
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#define SUNXI_RTWI0_RST_BIT (16)
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#define SUNXI_RTWI0_GATING_BIT (0)
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#define SUNXI_RTC_DATA_BASE (SUNXI_RTC_BASE + 0x100)
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/* use for usb correct */
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#define ANALOG_SYS_PWROFF_GATING_REG (SUNXI_RPRCM_BASE + 0x254)
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#define VDD_SYS_PWROFF_GATING_REG ANALOG_SYS_PWROFF_GATING_REG
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#define RES_CAL_CTRL_REG (SUNXI_SYSCRL_BASE + 0x160)
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#define VDD_ADDA_OFF_GATING (1)
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#define CAL_ANA_EN (1)
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#define CAL_EN (0)
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#define RVBARADDR0_L (SUNXI_CPUXCFG_BASE + 0x40)
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#define RVBARADDR0_H (SUNXI_CPUXCFG_BASE + 0x44)
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#define SRAM_CONTRL_REG0 (SUNXI_SYSCRL_BASE + 0x0)
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#define SRAM_CONTRL_REG1 (SUNXI_SYSCRL_BASE + 0x4)
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#define GPIO_BIAS_MAX_LEN (32)
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#define GPIO_BIAS_MAIN_NAME "gpio_bias"
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#define GPIO_POW_MODE_REG (0x0340)
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#define GPIO_POW_MODE_VAL_REG (0x0348)
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#define GPIO_3_3V_MODE 0
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#define GPIO_1_8V_MODE 1
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/* sram layout*/
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#define CONFIG_SYS_SRAM_BASE (0x20000)
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#define CONFIG_SYS_SRAM_SIZE (0x4000)
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#define CONFIG_SYS_SRAMA2_BASE (0x100000)
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#define CONFIG_SYS_SRAMA2_SIZE (0x14000)
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#define CONFIG_SYS_SRAMC_BASE (0x24000)
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#define CONFIG_SYS_SRAMC_SIZE (0x21000)
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/* scp mem layout */
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#define SCP_DRAM_SIZE (0x0000)
/* no cpus dram code on sun50iw10 */
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#define SCP_DTS_SIZE (0x40000)
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#define SCP_CODE_DRAM_OFFSET (0x14000)
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#define SCP_SRAM_BASE (CONFIG_SYS_SRAMA2_BASE)
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#define SCP_SRAM_SIZE (CONFIG_SYS_SRAMA2_SIZE)
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#define HEADER_OFFSET (0x4000)
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#endif
// __SUN50IW10_REG_NCAT_H__
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