Macros
#define	SDRAM_BASE (0x80000000)

#define	MCTL_COM_BASE (0x43102000)

#define	MCTL_COM_WORK_MODE0 (0x00)

#define	MCTL_COM_WORK_MODE1 (0x04)

#define	MCTL_COM_DBGCR (0x08)

#define	MCTL_COM_TMR (0x0c)

#define	MCTL_COM_CCCR (0x14)

#define	MCTL_COM_MAER0 (0x20)

#define	MCTL_COM_MAER1 (0x24)

#define	MCTL_COM_MAER2 (0x28)

#define	MCTL_COM_REMAP0 (0x500)

#define	MCTL_COM_REMAP1 (0x504)

#define	MCTL_COM_REMAP2 (0x508)

#define	MCTL_COM_REMAP3 (0x50c)

#define	MCTL_PHY_BASE (0x43103000)

#define	MCTL_PHY_PIR (0x00)

#define	MCTL_PHY_PWRCTL (0x04)

#define	MCTL_PHY_MRCTRL0 (0x08)

#define	MCTL_PHY_CLKEN (0x0c)

#define	MCTL_PHY_PGSR0 (0x10)

#define	MCTL_PHY_PGSR1 (0x14)

#define	MCTL_PHY_STATR (0x18)

#define	MCTL_PHY_LP3MR11 (0x2c)

#define	MCTL_PHY_DRAM_MR0 (0x30)

#define	MCTL_PHY_DRAM_MR1 (0x34)

#define	MCTL_PHY_DRAM_MR2 (0x38)

#define	MCTL_PHY_DRAM_MR3 (0x3c)

#define	MCTL_PHY_PTR0 (0x44)

#define	MCTL_PHY_PTR2 (0x4c)

#define	MCTL_PHY_PTR3 (0x50)

#define	MCTL_PHY_PTR4 (0x54)

#define	MCTL_PHY_DRAMTMG0 (0x58)

#define	MCTL_PHY_DRAMTMG1 (0x5c)

#define	MCTL_PHY_DRAMTMG2 (0x60)

#define	MCTL_PHY_DRAMTMG3 (0x64)

#define	MCTL_PHY_DRAMTMG4 (0x68)

#define	MCTL_PHY_DRAMTMG5 (0x6c)

#define	MCTL_PHY_DRAMTMG6 (0x70)

#define	MCTL_PHY_DRAMTMG7 (0x74)

#define	MCTL_PHY_DRAMTMG8 (0x78)

#define	MCTL_PHY_ODTCFG (0x7c)

#define	MCTL_PHY_PITMG0 (0x80)

#define	MCTL_PHY_PITMG1 (0x84)

#define	MCTL_PHY_LPTPR (0x88)

#define	MCTL_PHY_RFSHCTL0 (0x8c)

#define	MCTL_PHY_RFSHTMG (0x90)

#define	MCTL_PHY_RFSHCTL1 (0x94)

#define	MCTL_PHY_PWRTMG (0x98)

#define	MCTL_PHY_ASRC (0x9c)

#define	MCTL_PHY_ASRTC (0xa0)

#define	MCTL_PHY_VTFCR (0xb8)

#define	MCTL_PHY_DQSGMR (0xbc)

#define	MCTL_PHY_DTCR (0xc0)

#define	MCTL_PHY_DTAR0 (0xc4)

#define	MCTL_PHY_PGCR0 (0x100)

#define	MCTL_PHY_PGCR1 (0x104)

#define	MCTL_PHY_PGCR2 (0x108)

#define	MCTL_PHY_PGCR3 (0x10c)

#define	MCTL_PHY_IOVCR0 (0x110)

#define	MCTL_PHY_IOVCR1 (0x114)

#define	MCTL_PHY_DXCCR (0x11c)

#define	MCTL_PHY_ODTMAP (0x120)

#define	MCTL_PHY_ZQCTL0 (0x124)

#define	MCTL_PHY_ZQCTL1 (0x128)

#define	MCTL_PHY_ZQCR (0x140)

#define	MCTL_PHY_ZQSR (0x144)

#define	MCTL_PHY_ZQDR0 (0x148)

#define	MCTL_PHY_ZQDR1 (0x14c)

#define	MCTL_PHY_ZQDR2 (0x150)

#define	MCTL_PHY_SCHED (0x1c0)

#define	MCTL_PHY_PERFHPR0 (0x1c4)

#define	MCTL_PHY_PERFHPR1 (0x1c8)

#define	MCTL_PHY_PERFLPR0 (0x1cc)

#define	MCTL_PHY_PERFLPR1 (0x1d0)

#define	MCTL_PHY_PERFWR0 (0x1d4)

#define	MCTL_PHY_PERFWR1 (0x1d8)

#define	MCTL_PHY_ACMDLR (0x200)

#define	MCTL_PHY_ACLDLR (0x204)

#define	MCTL_PHY_ACIOCR0 (0x208)

#define	MCTL_PHY_ACIOCR1(x) (0x210 + 0x4 * x)

#define	MCTL_PHY_DXnMDLR(x) (0x300 + 0x80 * x)

#define	MCTL_PHY_DXnLDLR0(x) (0x304 + 0x80 * x)

#define	MCTL_PHY_DXnLDLR1(x) (0x308 + 0x80 * x)

#define	MCTL_PHY_DXnLDLR2(x) (0x30c + 0x80 * x)

#define	MCTL_PHY_DXIOCR (0x310)

#define	MCTL_PHY_DATX0IOCR(x) (0x310 + 0x4 * x)

#define	MCTL_PHY_DATX1IOCR(x) (0x390 + 0x4 * x)

#define	MCTL_PHY_DATX2IOCR(x) (0x410 + 0x4 * x)

#define	MCTL_PHY_DATX3IOCR(x) (0x490 + 0x4 * x)

#define	MCTL_PHY_DXnSDLR6(x) (0x33c + 0x80 * x)

#define	MCTL_PHY_DXnGTR(x) (0x340 + 0x80 * x)

#define	MCTL_PHY_DXnGCR0(x) (0x344 + 0x80 * x)

#define	MCTL_PHY_DXnGSR0(x) (0x348 + 0x80 * x)

#define	SUNXI_R_CPUCFG_SUP_STAN_FLAG (SUNXI_PRCM_BASE + 0x01C0)

#define	VDD_SYS_PWROFF_GATING_REG (SUNXI_PMU_RTC_BASE + 0x38)

#define	ANALOG_PWROFF_GATING_REG (SUNXI_PMU_RTC_BASE + 0x3c)

#define	ZQ_CAL_CTRL_REG (SUNXI_SYSCTRL_BASE + 0x160)

#define	ZQ_RES_CTRL_REG (SUNXI_SYSCTRL_BASE + 0x168)

#define	ZQ_RES_STATUS_REG (SUNXI_SYSCTRL_BASE + 0x16C)

Macro Definition Documentation

◆ ANALOG_PWROFF_GATING_REG

#define ANALOG_PWROFF_GATING_REG (SUNXI_PMU_RTC_BASE + 0x3c)

◆ MCTL_COM_BASE

#define MCTL_COM_BASE (0x43102000)

◆ MCTL_COM_CCCR

#define MCTL_COM_CCCR (0x14)

◆ MCTL_COM_DBGCR

#define MCTL_COM_DBGCR (0x08)

◆ MCTL_COM_MAER0

#define MCTL_COM_MAER0 (0x20)

◆ MCTL_COM_MAER1

#define MCTL_COM_MAER1 (0x24)

◆ MCTL_COM_MAER2

#define MCTL_COM_MAER2 (0x28)

◆ MCTL_COM_REMAP0

#define MCTL_COM_REMAP0 (0x500)

◆ MCTL_COM_REMAP1

#define MCTL_COM_REMAP1 (0x504)

◆ MCTL_COM_REMAP2

#define MCTL_COM_REMAP2 (0x508)

◆ MCTL_COM_REMAP3

#define MCTL_COM_REMAP3 (0x50c)

◆ MCTL_COM_TMR

#define MCTL_COM_TMR (0x0c)

◆ MCTL_COM_WORK_MODE0

#define MCTL_COM_WORK_MODE0 (0x00)

◆ MCTL_COM_WORK_MODE1

#define MCTL_COM_WORK_MODE1 (0x04)

◆ MCTL_PHY_ACIOCR0

#define MCTL_PHY_ACIOCR0 (0x208)

◆ MCTL_PHY_ACIOCR1

#define MCTL_PHY_ACIOCR1 ( x ) (0x210 + 0x4 * x)

◆ MCTL_PHY_ACLDLR

#define MCTL_PHY_ACLDLR (0x204)

◆ MCTL_PHY_ACMDLR

#define MCTL_PHY_ACMDLR (0x200)

◆ MCTL_PHY_ASRC

#define MCTL_PHY_ASRC (0x9c)

◆ MCTL_PHY_ASRTC

#define MCTL_PHY_ASRTC (0xa0)

◆ MCTL_PHY_BASE

#define MCTL_PHY_BASE (0x43103000)

◆ MCTL_PHY_CLKEN

#define MCTL_PHY_CLKEN (0x0c)

◆ MCTL_PHY_DATX0IOCR

#define MCTL_PHY_DATX0IOCR ( x ) (0x310 + 0x4 * x)

◆ MCTL_PHY_DATX1IOCR

#define MCTL_PHY_DATX1IOCR ( x ) (0x390 + 0x4 * x)

◆ MCTL_PHY_DATX2IOCR

#define MCTL_PHY_DATX2IOCR ( x ) (0x410 + 0x4 * x)

◆ MCTL_PHY_DATX3IOCR

#define MCTL_PHY_DATX3IOCR ( x ) (0x490 + 0x4 * x)

◆ MCTL_PHY_DQSGMR

#define MCTL_PHY_DQSGMR (0xbc)

◆ MCTL_PHY_DRAM_MR0

#define MCTL_PHY_DRAM_MR0 (0x30)

◆ MCTL_PHY_DRAM_MR1

#define MCTL_PHY_DRAM_MR1 (0x34)

◆ MCTL_PHY_DRAM_MR2

#define MCTL_PHY_DRAM_MR2 (0x38)

◆ MCTL_PHY_DRAM_MR3

#define MCTL_PHY_DRAM_MR3 (0x3c)

◆ MCTL_PHY_DRAMTMG0

#define MCTL_PHY_DRAMTMG0 (0x58)

◆ MCTL_PHY_DRAMTMG1

#define MCTL_PHY_DRAMTMG1 (0x5c)

◆ MCTL_PHY_DRAMTMG2

#define MCTL_PHY_DRAMTMG2 (0x60)

◆ MCTL_PHY_DRAMTMG3

#define MCTL_PHY_DRAMTMG3 (0x64)

◆ MCTL_PHY_DRAMTMG4

#define MCTL_PHY_DRAMTMG4 (0x68)

◆ MCTL_PHY_DRAMTMG5

#define MCTL_PHY_DRAMTMG5 (0x6c)

◆ MCTL_PHY_DRAMTMG6

#define MCTL_PHY_DRAMTMG6 (0x70)

◆ MCTL_PHY_DRAMTMG7

#define MCTL_PHY_DRAMTMG7 (0x74)

◆ MCTL_PHY_DRAMTMG8

#define MCTL_PHY_DRAMTMG8 (0x78)

◆ MCTL_PHY_DTAR0

#define MCTL_PHY_DTAR0 (0xc4)

◆ MCTL_PHY_DTCR

#define MCTL_PHY_DTCR (0xc0)

◆ MCTL_PHY_DXCCR

#define MCTL_PHY_DXCCR (0x11c)

◆ MCTL_PHY_DXIOCR

#define MCTL_PHY_DXIOCR (0x310)

◆ MCTL_PHY_DXnGCR0

#define MCTL_PHY_DXnGCR0 ( x ) (0x344 + 0x80 * x)

◆ MCTL_PHY_DXnGSR0

#define MCTL_PHY_DXnGSR0 ( x ) (0x348 + 0x80 * x)

◆ MCTL_PHY_DXnGTR

#define MCTL_PHY_DXnGTR ( x ) (0x340 + 0x80 * x)

◆ MCTL_PHY_DXnLDLR0

#define MCTL_PHY_DXnLDLR0 ( x ) (0x304 + 0x80 * x)

◆ MCTL_PHY_DXnLDLR1

#define MCTL_PHY_DXnLDLR1 ( x ) (0x308 + 0x80 * x)

◆ MCTL_PHY_DXnLDLR2

#define MCTL_PHY_DXnLDLR2 ( x ) (0x30c + 0x80 * x)

◆ MCTL_PHY_DXnMDLR

#define MCTL_PHY_DXnMDLR ( x ) (0x300 + 0x80 * x)

◆ MCTL_PHY_DXnSDLR6

#define MCTL_PHY_DXnSDLR6 ( x ) (0x33c + 0x80 * x)

◆ MCTL_PHY_IOVCR0

#define MCTL_PHY_IOVCR0 (0x110)

◆ MCTL_PHY_IOVCR1

#define MCTL_PHY_IOVCR1 (0x114)

◆ MCTL_PHY_LP3MR11

#define MCTL_PHY_LP3MR11 (0x2c)

◆ MCTL_PHY_LPTPR

#define MCTL_PHY_LPTPR (0x88)

◆ MCTL_PHY_MRCTRL0

#define MCTL_PHY_MRCTRL0 (0x08)

◆ MCTL_PHY_ODTCFG

#define MCTL_PHY_ODTCFG (0x7c)

◆ MCTL_PHY_ODTMAP

#define MCTL_PHY_ODTMAP (0x120)

◆ MCTL_PHY_PERFHPR0

#define MCTL_PHY_PERFHPR0 (0x1c4)

◆ MCTL_PHY_PERFHPR1

#define MCTL_PHY_PERFHPR1 (0x1c8)

◆ MCTL_PHY_PERFLPR0

#define MCTL_PHY_PERFLPR0 (0x1cc)

◆ MCTL_PHY_PERFLPR1

#define MCTL_PHY_PERFLPR1 (0x1d0)

◆ MCTL_PHY_PERFWR0

#define MCTL_PHY_PERFWR0 (0x1d4)

◆ MCTL_PHY_PERFWR1

#define MCTL_PHY_PERFWR1 (0x1d8)

◆ MCTL_PHY_PGCR0

#define MCTL_PHY_PGCR0 (0x100)

◆ MCTL_PHY_PGCR1

#define MCTL_PHY_PGCR1 (0x104)

◆ MCTL_PHY_PGCR2

#define MCTL_PHY_PGCR2 (0x108)

◆ MCTL_PHY_PGCR3

#define MCTL_PHY_PGCR3 (0x10c)

◆ MCTL_PHY_PGSR0

#define MCTL_PHY_PGSR0 (0x10)

◆ MCTL_PHY_PGSR1

#define MCTL_PHY_PGSR1 (0x14)

◆ MCTL_PHY_PIR

#define MCTL_PHY_PIR (0x00)

◆ MCTL_PHY_PITMG0

#define MCTL_PHY_PITMG0 (0x80)

◆ MCTL_PHY_PITMG1

#define MCTL_PHY_PITMG1 (0x84)

◆ MCTL_PHY_PTR0

#define MCTL_PHY_PTR0 (0x44)

◆ MCTL_PHY_PTR2

#define MCTL_PHY_PTR2 (0x4c)

◆ MCTL_PHY_PTR3

#define MCTL_PHY_PTR3 (0x50)

◆ MCTL_PHY_PTR4

#define MCTL_PHY_PTR4 (0x54)

◆ MCTL_PHY_PWRCTL

#define MCTL_PHY_PWRCTL (0x04)

◆ MCTL_PHY_PWRTMG

#define MCTL_PHY_PWRTMG (0x98)

◆ MCTL_PHY_RFSHCTL0

#define MCTL_PHY_RFSHCTL0 (0x8c)

◆ MCTL_PHY_RFSHCTL1

#define MCTL_PHY_RFSHCTL1 (0x94)

◆ MCTL_PHY_RFSHTMG

#define MCTL_PHY_RFSHTMG (0x90)

◆ MCTL_PHY_SCHED

#define MCTL_PHY_SCHED (0x1c0)

◆ MCTL_PHY_STATR

#define MCTL_PHY_STATR (0x18)

◆ MCTL_PHY_VTFCR

#define MCTL_PHY_VTFCR (0xb8)

◆ MCTL_PHY_ZQCR

#define MCTL_PHY_ZQCR (0x140)

◆ MCTL_PHY_ZQCTL0

#define MCTL_PHY_ZQCTL0 (0x124)

◆ MCTL_PHY_ZQCTL1

#define MCTL_PHY_ZQCTL1 (0x128)

◆ MCTL_PHY_ZQDR0

#define MCTL_PHY_ZQDR0 (0x148)

◆ MCTL_PHY_ZQDR1

#define MCTL_PHY_ZQDR1 (0x14c)

◆ MCTL_PHY_ZQDR2

#define MCTL_PHY_ZQDR2 (0x150)

◆ MCTL_PHY_ZQSR

#define MCTL_PHY_ZQSR (0x144)

◆ SDRAM_BASE

#define SDRAM_BASE (0x80000000)

◆ SUNXI_R_CPUCFG_SUP_STAN_FLAG

#define SUNXI_R_CPUCFG_SUP_STAN_FLAG (SUNXI_PRCM_BASE + 0x01C0)

◆ VDD_SYS_PWROFF_GATING_REG

#define VDD_SYS_PWROFF_GATING_REG (SUNXI_PMU_RTC_BASE + 0x38)

◆ ZQ_CAL_CTRL_REG

#define ZQ_CAL_CTRL_REG (SUNXI_SYSCTRL_BASE + 0x160)

◆ ZQ_RES_CTRL_REG

#define ZQ_RES_CTRL_REG (SUNXI_SYSCTRL_BASE + 0x168)

◆ ZQ_RES_STATUS_REG

#define ZQ_RES_STATUS_REG (SUNXI_SYSCTRL_BASE + 0x16C)

Macros