sys-spi.h File Reference

#include <io.h>
#include <stdarg.h>
#include <stdbool.h>
#include <stddef.h>
#include <stdint.h>
#include <types.h>
#include <sys-clk.h>
#include <sys-dma.h>
#include <sys-gpio.h>
#include <log.h>
#include <reg-spi.h>

Include dependency graph for sys-spi.h:

Go to the source code of this file.

Classes
struct	sunxi_spi_gpio_t
	SPI GPIO Configuration Structure. More...
struct	sunxi_spi_clk_t
	SPI Clock Configuration Structure. More...
struct	sunxi_spi_t
	SPI Device Configuration Structure. More...

Macros
#define	MAX_FIFU   (64)
	Maximum FIFO size set to 64.
#define	SPI_CLK_SEL_PERIPH_300M   (0x1)
	Selects the SPI peripheral clock to 300 MHz.
#define	SPI_CLK_SEL_PERIPH_200M   (0x2)
	Selects the SPI peripheral clock to 200 MHz.
#define	SPI_CLK_SEL_FACTOR_N_OFF   (8)
	Offset for the SPI clock select factor is 8.
#define	SPI_DEFAULT_CLK_RST_OFFSET(x)   (x + 16)
	Returns the default clock reset offset, based on the SPI module number (x).
#define	SPI_DEFAULT_CLK_GATE_OFFSET(x)   (x)
	Returns the default clock gate offset, based on the SPI module number (x).

Enumerations
enum	spi_io_mode_t { SPI_IO_SINGLE = 0x00 , SPI_IO_DUAL_RX , SPI_IO_QUAD_RX , SPI_IO_QUAD_IO }
	SPI Input/Output Mode Enumeration. More...
enum	spi_speed_mode_t { SPI_LOW_FREQUENCY = 24000000 , SPI_MOD_FREQUENCY = 50000000 , SPI_HIGH_FREQUENCY = 60000000 , SPI_MAX_FREQUENCY = 100000000 }
	SPI Speed Mode Enumeration. More...
enum	spi_clk_cdr_mode_t { SPI_CDR1_MODE = 0 , SPI_CDR2_MODE = 1 , SPI_CDR_NONE = 2 }
	SPI Clock CDR Mode Enumeration. More...

Functions
int	sunxi_spi_init (sunxi_spi_t *spi)
	Initializes the SPI interface.
void	sunxi_spi_disable (sunxi_spi_t *spi)
	Disables the SPI interface.
int	sunxi_spi_update_clk (sunxi_spi_t *spi, uint32_t clk)
	Updates the SPI clock rate.
int	sunxi_spi_transfer (sunxi_spi_t *spi, spi_io_mode_t mode, void *txbuf, uint32_t txlen, void *rxbuf, uint32_t rxlen)
	Performs SPI data transfer.

Macro Definition Documentation

MAX_FIFU

#define MAX_FIFU   (64)

Maximum FIFO size set to 64.

SPI_CLK_SEL_FACTOR_N_OFF

#define SPI_CLK_SEL_FACTOR_N_OFF   (8)

Offset for the SPI clock select factor is 8.

SPI_CLK_SEL_PERIPH_200M

#define SPI_CLK_SEL_PERIPH_200M   (0x2)

Selects the SPI peripheral clock to 200 MHz.

SPI_CLK_SEL_PERIPH_300M

#define SPI_CLK_SEL_PERIPH_300M   (0x1)

Selects the SPI peripheral clock to 300 MHz.

SPI_DEFAULT_CLK_GATE_OFFSET

#define SPI_DEFAULT_CLK_GATE_OFFSET

(

x

)

(x)

Returns the default clock gate offset, based on the SPI module number (x).

SPI_DEFAULT_CLK_RST_OFFSET

#define SPI_DEFAULT_CLK_RST_OFFSET

(

x

)

(x + 16)

Returns the default clock reset offset, based on the SPI module number (x).

Enumeration Type Documentation

spi_clk_cdr_mode_t

enum spi_clk_cdr_mode_t

SPI Clock CDR Mode Enumeration.

This enum defines the clock CDR (Clock Data Recovery) modes.

Enumerator
SPI_CDR1_MODE	Clock Data Recovery mode 1.
SPI_CDR2_MODE	Clock Data Recovery mode 2.
SPI_CDR_NONE	No Clock Data Recovery mode.

spi_io_mode_t

enum spi_io_mode_t

SPI Input/Output Mode Enumeration.

This enum defines the different SPI I/O modes.

Enumerator
SPI_IO_SINGLE	Single I/O mode, using one data line.
SPI_IO_DUAL_RX	Dual I/O mode, using two data lines for receiving.
SPI_IO_QUAD_RX	Quad I/O mode, using four data lines for receiving.
SPI_IO_QUAD_IO	Quad I/O mode, using four data lines for both transmitting and receiving.

spi_speed_mode_t

enum spi_speed_mode_t

SPI Speed Mode Enumeration.

This enum defines the different SPI clock frequencies.

Enumerator
SPI_LOW_FREQUENCY	Low frequency: 24 MHz.
SPI_MOD_FREQUENCY	Medium frequency: 50 MHz.
SPI_HIGH_FREQUENCY	High frequency: 60 MHz.
SPI_MAX_FREQUENCY	Maximum frequency: 100 MHz.

Function Documentation

sunxi_spi_disable()

void sunxi_spi_disable

(

sunxi_spi_t *

spi

)

Disables the SPI interface.

This function disables the SPI bus, deinitializes DMA (if used), and deinitializes the SPI clock. It is called when the SPI interface is no longer needed or when performing cleanup operations.

Parameters

spi	Pointer to the SPI structure containing configuration and register information.

sunxi_spi_init()

int sunxi_spi_init

(

sunxi_spi_t *

spi

)

Initializes the SPI interface.

This function initializes the SPI interface by configuring the GPIO pins, clock, bus, and counters. If a DMA handle is set, DMA mode is used for data transfers. The function calls several other SPI initialization functions to set up the SPI hardware.

Parameters

spi	Pointer to the SPI structure containing configuration and register information.

Returns

0 on success.

sunxi_spi_transfer()

int sunxi_spi_transfer	(	sunxi_spi_t *	spi,
		spi_io_mode_t	mode,
		void *	txbuf,
		uint32_t	txlen,
		void *	rxbuf,
		uint32_t	rxlen
	)

Performs SPI data transfer.

This function initiates a data transfer on the SPI bus. The transfer can be either full-duplex (both transmission and reception) or half-duplex (only transmission or reception). The transfer is done based on the specified SPI I/O mode. The function handles both transmit and receive operations, including the use of DMA if required for large transfers.

Parameters

spi	Pointer to the SPI structure containing configuration and register information.
mode	The I/O mode to use for the transfer (e.g., single, dual, quad).
txbuf	Pointer to the transmission buffer.
txlen	Length of the transmission data in bytes.
rxbuf	Pointer to the reception buffer.
rxlen	Length of the reception data in bytes.

Returns

The total number of bytes transferred (txlen + rxlen).

sunxi_spi_update_clk()

int sunxi_spi_update_clk	(	sunxi_spi_t *	spi,
		uint32_t	clk
	)

Updates the SPI clock rate.

This function updates the SPI clock rate and reinitializes the clock, bus, and transfer control settings to apply the new clock rate.

Parameters

spi	Pointer to the SPI structure containing configuration and register information.
clk	The new clock rate to be set.

Returns

0 on success.