SyterKit 0.4.0.x
SyterKit is a bare-metal framework
Loading...
Searching...
No Matches
Macros | Functions | Variables
main.c File Reference
#include <stdbool.h>
#include <stddef.h>
#include <stdint.h>
#include <types.h>
#include <log.h>
#include <common.h>
#include <jmp.h>
#include <mmu.h>
#include <smalloc.h>
#include <sstdlib.h>
#include <string.h>
#include "sys-dma.h"
#include "sys-dram.h"
#include "sys-spi.h"
#include "lcd.h"
#include "lcd_init.h"
Include dependency graph for main.c:

Macros

#define CONFIG_HEAP_BASE   (0x40800000)
 
#define CONFIG_HEAP_SIZE   (16 * 1024 * 1024)
 

Functions

static void LCD_Set_DC (uint8_t val)
 
static void LCD_Set_RES (uint8_t val)
 
static void LCD_Write_Bus (uint8_t dat)
 
void LCD_Write_Data_Bus (void *dat, uint32_t len)
 
void LCD_WR_DATA (uint16_t dat)
 
void LCD_Address_Set (uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2)
 
void LCD_WR_DATA8 (uint8_t dat)
 
void LCD_WR_REG (uint8_t dat)
 
static void LCD_Init (void)
 
int main (void)
 

Variables

sunxi_serial_t uart_dbg
 
dram_para_t dram_para
 
sunxi_dma_t sunxi_dma
 
static sunxi_spi_t sunxi_spi0_lcd
 
static gpio_mux_t lcd_dc_pins
 
static gpio_mux_t lcd_res_pins
 

Macro Definition Documentation

◆ CONFIG_HEAP_BASE

#define CONFIG_HEAP_BASE   (0x40800000)

◆ CONFIG_HEAP_SIZE

#define CONFIG_HEAP_SIZE   (16 * 1024 * 1024)

Function Documentation

◆ LCD_Address_Set()

void LCD_Address_Set ( uint16_t  x1,
uint16_t  y1,
uint16_t  x2,
uint16_t  y2 
)

◆ LCD_Init()

static void LCD_Init ( void  )
static

◆ LCD_Set_DC()

static void LCD_Set_DC ( uint8_t  val)
static

◆ LCD_Set_RES()

static void LCD_Set_RES ( uint8_t  val)
static

◆ LCD_WR_DATA()

void LCD_WR_DATA ( uint16_t  dat)

◆ LCD_WR_DATA8()

void LCD_WR_DATA8 ( uint8_t  dat)

◆ LCD_WR_REG()

void LCD_WR_REG ( uint8_t  dat)

◆ LCD_Write_Bus()

static void LCD_Write_Bus ( uint8_t  dat)
static

◆ LCD_Write_Data_Bus()

void LCD_Write_Data_Bus ( void *  dat,
uint32_t  len 
)

◆ main()

int main ( void  )

Variable Documentation

◆ dram_para

dram_para_t dram_para
extern

◆ lcd_dc_pins

gpio_mux_t lcd_dc_pins
static
Initial value:
= {
.pin = GPIO_PIN(GPIO_PORTC, 4),
.mux = GPIO_OUTPUT,
}
@ GPIO_PORTC
Definition sys-gpio.h:41
@ GPIO_OUTPUT
Definition sys-gpio.h:21
#define GPIO_PIN(x, y)
Definition sys-gpio.h:66

◆ lcd_res_pins

gpio_mux_t lcd_res_pins
static
Initial value:
= {
.pin = GPIO_PIN(GPIO_PORTC, 5),
.mux = GPIO_OUTPUT,
}

◆ sunxi_dma

sunxi_dma_t sunxi_dma
extern

◆ sunxi_spi0_lcd

sunxi_spi_t sunxi_spi0_lcd
static
Initial value:
= {
.base = 0x04025000,
.id = 0,
.clk_rate = 75 * 1000 * 1000,
.gpio =
{
.gpio_sck = {GPIO_PIN(GPIO_PORTC, 0), GPIO_PERIPH_MUX4},
.gpio_mosi = {GPIO_PIN(GPIO_PORTC, 2), GPIO_PERIPH_MUX4},
.gpio_miso = {GPIO_PIN(GPIO_PORTC, 3), GPIO_PERIPH_MUX4},
},
.spi_clk =
{
.spi_clock_cfg_base = CCU_BASE + CCU_SPI0_CLK_REG,
.spi_clock_factor_n_offset = SPI_CLK_SEL_FACTOR_N_OFF,
.spi_clock_source = SPI_CLK_SEL_PERIPH_300M,
},
.parent_clk_reg =
{
.rst_reg_base = CCU_BASE + CCU_SPI_BGR_REG,
.rst_reg_offset = SPI_DEFAULT_CLK_RST_OFFSET(0),
.gate_reg_base = CCU_BASE + CCU_SPI_BGR_REG,
.gate_reg_offset = SPI_DEFAULT_CLK_GATE_OFFSET(0),
.parent_clk = 300000000,
},
.dma_handle = &sunxi_dma,
}
sunxi_dma_t sunxi_dma
Definition board.c:45
#define CCU_SPI_BGR_REG
Definition reg-ccu.h:74
#define CCU_SPI0_CLK_REG
Definition reg-ccu.h:73
#define CCU_BASE
Definition reg-ccu.h:8
@ GPIO_PERIPH_MUX4
Definition sys-gpio.h:24
#define SPI_CLK_SEL_PERIPH_300M
Selects the SPI peripheral clock to 300 MHz.
Definition sys-spi.h:103
#define SPI_CLK_SEL_FACTOR_N_OFF
Offset for the SPI clock select factor is 8.
Definition sys-spi.h:105
#define SPI_DEFAULT_CLK_GATE_OFFSET(x)
Returns the default clock gate offset, based on the SPI module number (x).
Definition sys-spi.h:107
#define SPI_DEFAULT_CLK_RST_OFFSET(x)
Returns the default clock reset offset, based on the SPI module number (x).
Definition sys-spi.h:106

◆ uart_dbg

sunxi_serial_t uart_dbg
extern