= {
.id = 0,
.gpio_pin =
{
},
.uart_clk =
{
},
}
#define SUNXI_UART0_BASE
Definition reg-ncat.h:32
#define SUNXI_CCU_BASE
Definition reg-ncat.h:18
#define UART0_GAR_REG
Definition reg-ccu.h:1388
@ UART_STOP_BIT_0
Definition sys-uart.h:41
@ UART_BAUDRATE_115200
Definition sys-uart.h:24
#define SERIAL_DEFAULT_PARENT_CLK
Definition sys-uart.h:99
#define SERIAL_DEFAULT_CLK_RST_OFFSET(x)
Definition sys-uart.h:96
@ UART_PARITY_NO
Definition sys-uart.h:34
@ UART_DLEN_8
Definition sys-uart.h:50
#define SERIAL_DEFAULT_CLK_GATE_OFFSET(x)
Definition sys-uart.h:97
@ GPIO_PORTB
Definition sys-gpio.h:40